I'm trying to code in VHDL a 4 bit counter that counts from "0000" to "1111" or from "1111" to "0000" depending on the value of my UD variable (if UD='1' it should count down and if it's ='0' up). There is also a signal RCO_L that gets value='0' when my counter reaches one of the sides of the counter (0 or 15). Lastly there's a ENP_L signal that inhibits my counter when it's set to 1. I'm trying to code in VHDL a 4 bit counter that