使用TSC作为时钟源是否提高了计时器和调度粒度?

In processors that support time stamp counter (TSC) Linux provides the high resolution timer option using TSC. From what I understand TSC is a register that can be read but doesn't provide the option to interrupt the CPU at a configured rate. So for the timer interrupt generation in Linux still has to rely on I/O APIC (on x86) with HZ value typically set to 1000 or 250.In processors that support time stamp counter (