For testing a cache system, I need the memory access (read and writes) list for a particular process. The cache code is written in verilog. My application is for media processing, however I'm open to other applications as well.. So far I have been adding address references in the C++ code for PNG decoding (available here For testing a cache system, I need the memory a
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如何记录进程/文件的所有内存访问？
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